Program Block Overview


 Separates the testbench from the DUT
 Reduces race conditions by running in separate region
 Provides an entry point for execution
 Creates a scope to encapsulate program-wide data


 Can be instantiated in any hierarchical location i.e Typically at the top level
 Interfaces and ports can be connected in the same manner as any other module
 Code goes in initial blocks & routines, no always blocks
 Executes in the Reactive region
 Implicit $finish when all initial blocks end in program

Program Block

 In Systemverilog the test bench code is in a program block
 Program block is similar to a module and can contain code and variables and be instantiated in other modules
 A program cannot have hierarchy such as instances of modules or interfaces


program testcase ( );

$display ("*********** Start of program ***************");

$display ("*********** End of program ***************");

Program Block consideration

  • A program block cannot contain:
  • . always blocks
    . Instantiated modules
    . other programs
  • An interface or clocking block is not required to use a program block
  • All programs need to finish before $finish is implicitly called